In general, a sigma-delta modulation method is one of methods for converting an analog signal derived from a delta modulation method into a digital signal and is able to obtain a high resolution.
The sigma-delta modulation method is widely used in many wired/wireless communications systems. Korean Laid-Open Patent Application No. 10-2005-0010954 proposes the third order sigma delta modulator in a frequency synthesizer.
FIG. 1 is a view showing a conventional digital sigma-delta modulator which processes one input/output.
Referring to FIG. 1, the conventional digital sigma-delta modulator (SDM) is implemented with one adder 10 and one memory 20, converts N-bit input data into oversampled one bit output data, and then outputs the converted one bit output data.
The converted one bit output data is passed through a predetermined digital filter, and thus, a specific frequency component of the N-bit input data is obtained very accurately.
FIGS. 2a to 2b are views showing the conventional digital sigma-delta modulator which processes a plurality of inputs and outputs.
Referring to FIG. 2a, M number of the digital sigma-delta modulators may be used to operate simultaneously for the respective M pairs of inputs and outputs. Thus, hardware becomes larger because the number of the digital sigma-delta modulators required is the same as that of the pairs of inputs and outputs to be processed.
Referring to FIG. 2b, for the purpose of processing a plurality of inputs and outputs, the conventional digital sigma-delta modulator operates with one SDM and multiplexers (MUXs) and demultiplexers (De-MUXs).
When M number of inputs and outputs are processed by using the multiplexer, the size of the entire hardware may become smaller because in this case only one adder, instead of M number of adders, is used.
However, since M number of memories are still used, the reduced amount of hardware is necessarily limited.